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p072970618
p072970618
http://data.bibliotheken.nl/id/thes/p072970618
Technology mapping from Boolean expressions to standard cells / by M.R.C.M. Berkelaar and J.F.M. Theeuwen
Area-power-delay trade-off in logic synthesis / Michel R.C.M. Berkelaar
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p072970618
http://data.bibliotheken.nl/id/thes/p072970618